Schoenbrunn Palace

DSD 2017 Mixed-Criticality System Design, Implementation and Analysis

Call for Papers:
Mixed-Criticality System Design, Implementation and Analysis (MCSDIA)

Download the call for papers in pdf format >>

Special Session Scope

Modern embedded appliances already integrate a multitude of functionalities with potentially different criticality levels into a single system and this trend is expected to grow in the near future. The integration of multiple functions with different criticality and certification assurance levels on a shared computing platform constitutes a mixed-criticality system (MCS). Mixed-criticality systems range from lowest assurance requirements up to the highest criticality levels (e.g., DAL A in RTCA DO-178B or SIL4 in EN ISO/IEC 61508). In many domains such as automotive, avionics and industrial control, the economic success depends on the ability to design, implement, qualify and certify advanced real-time embedded systems within bounded time, effort and costs. Without appropriate preconditions, the integration of mixed-criticality subsystems can lead to a significant and potentially unacceptable increase of engineering and certification costs. There are several ongoing research initiatives studying mixed-criticality integration in single and multicore processors, as well as on distributed systems. Key challenges are the combination of software virtualization and hardware segregation and the extension of partitioning mechanisms jointly addressing significant extra-functional requirements (e.g., time, energy and power budgets, adaptivity, reliability, safety, security, volume, weight, etc.) along with a proven development and certification methodology. To support the design and implementation of mixed-criticality systems, new design techniques and tools for the analysis of extra-functional properties are required.

Topics of interest include, but are not limited to, the following:

  1. Requirements engineering and traceability for mixed-criticality systems
  2. Multi-physical component- and model-based design techniques
  3. Reliability and energy integrity of services for mixed-criticality systems, health monitoring
  4. Dependable operation of battery-driven/mobile mixed-criticality systems
  5. Dynamic resource management for mixed-criticality systems
  6. Mechanisms for temporal and spatial partitioning, including physical resource virtualization for temporal and spatial segregation and resources partitioning techniques at chip and cluster level to achieve composability in multiple dimensions (time, power, temperature)
  7. Solutions for communication resource partitioning and virtualization on chip and off-chip
  8. Composable analysis of extra-functional properties (like timing, power, temperature, safety and security) & certification techniques
  9. (Incremental) verification of extra-functional properties
  10. Modular safety cases
  11. Design-space exploration for multi-physical mixed-criticality systems
  12. Industrial case-studies and best practice

Submission Guidelines

Authors are encouraged to submit their manuscripts to Should an unexpected web access problem be encountered, please contact the Program Chair by email (dsd2017[at]

Each manuscript should include the complete paper text, all illustrations, and references. The manuscript should conform to the IEEE format: single-spaced, double column, US letter page size, 10-point size Times Roman font, up to 8 pages. In order to conduct a blind review, no indication of the authors' names should appear in the manuscript, references included.

IEEE Conference Publishing Services (CPS) will publish accepted papers in the conference proceedings and the proceedings will be submitted to the IEEE Xplore Digital library and indexing services. Extended versions of selected best papers will be published in a special issue of the ISI indexed “Microprocessors and Microsystems: Embedded Hardware Design” Elsevier journal.

Special Session Chairs

Kim Grüttner (OFFIS, DE)

Eugenio Villar (U Cantabria, ES)

Special Session Program Committee

Kim Grüttner (OFFIS, DE)

Eugenio Villar (U Cantabria, ES)

Sanjoy Baruah (U North Carolina, USA)

Gedare Bloom (George Washington U, USA)

Francisco J. Cazorla (BSC & IIIA-CSIC, ES)

Alfons Crespo (UPV & FentISS, ES)

Arvind Easwaran (Nanyang TU, Singapore)

William Fornaciari (Politecnico di Milano, IT)

Franco Fummi (U Verona, IT)

Kees Goossens (TU/e, NL)

Philipp A. Hartmann (Intel, DE)

Silvia Mazzini (INTECS, IT)

Julio Medina (U Cantabria, ES)

Moritz Neukirchner (Elektrobit Auto., DE)

Roman Obermaisser (U Siegen, DE)

Michael Paulitsch (Thales, AT)

Ingo Sander (KTH, SE)

Ingo Stierand (CvO Uni Oldenburg, DE)

Jean-Loup Terraillon (ESA, NL)

Salvador Trujillo (IK4-IKERLAN, ES)

Sascha Uhrig (Airbus, DE)

Andreas von Schwerin (Siemens, DE)