Schoenbrunn Palace

DSD 2017 Architecture and Hardware for Security Applications

Call for Papers:
Architecture and Hardware for Security Applications (AHSA)

Download the call for papers in pdf format >>

Special Session Scope

The scope of this special session is on all views of hardware-oriented security. The session provides an excellent opportunity to present new results from both the research and industry communities. Of special interests are contributions that describe new methods for secure and efficient hardware implementations for embedded systems, hardware Trojans – insertion/detection methodologies, side channel analysis, fault attacks, security of Internet of Things etc. The topics of this special session include but are not limited to:

  • Security of Cyber-Physical Systems
  • Security architectures in Embedded Systems
  • Protection of Internet of Things (IoT)
  • Attacks against hardware implementations and countermeasures
  • Hardware Trojans and detection techniques
  • IC Trust and anti-Counterfeiting
  • Reverse engineering and hardware obfuscation
  • Hardware security primitives: PUFs and TRNGs
  • Applications of secure hardware
  • Security architectures for pervasive computing and wireless applications/protocols
  • Trusted computing platforms
  • Secure FPGA and System-on-Chip (SoC) designs
  • Lightweight cryptography and implementations
  • Vehicular security hardware implementations
  • Hardware architectures for cryptanalysis
  • Secure and efficient implementation of crypto and hashing algorithms
  • Crypto implementations in area constrained environments
  • Processors for smart card security
  • Secure life cycle management
  • Energy-aware secure architectures

Submission Guidelines

Authors are encouraged to submit their manuscripts to Should an unexpected web access problem be encountered, please contact the Program Chair by email (dsd2017[at]

Each manuscript should include the complete paper text, all illustrations, and references. The manuscript should conform to the IEEE format: single-spaced, double column, US letter page size, 10-point size Times Roman font, up to 8 pages. In order to conduct a blind review, no indication of the authors' names should appear in the manuscript, references included.

IEEE Conference Publishing Services (CPS) will publish accepted papers in the conference proceedings and the proceedings will be submitted to the IEEE Xplore Digital library and indexing services. Extended versions of selected best papers will be published in a special issue of the ISI indexed “Microprocessors and Microsystems: Embedded Hardware Design” Elsevier journal.

Special Session Chairs

Paris Kitsos (TEI Western Greece, GR)

Rajat Subhra Chakraborty (Indian Inst. of Tech. Kharagpur, India)

Special Session Program Committee

Giovanni Agosta, Politecnico di Milano, Italy

Aydin Aysu, Univ. of Texas at Austin, USA

Rajat Subhra Chakraborty, Indian Inst. of Tech. Kharagpur, India

Elena Dubrova, Royal Institute of Technology (KTH), Sweden

Zoya Dyka, IHP Microelectronics, Germany

Claudia Feregrino-Uribe, INAOE, Mexico

Apostolos Fournaris, TEI Western Greece, Greece

Jacques Fournier, CEA Leti, France

Houman Homayoun, George Mason Univ., USA

Odysseas Koufopavlou, University of Patras, Greece

Francesco Leporati, University of Pavia, Italy

Filippo Melzani, STMicroelectronics, Italy

Amir Moradi, Ruhr University Bochum, Germany

Martin Novotny, Czech Technical University in Prague, Czech Republic

Gerardo Pelosi, Politecnico di Milano, Italy

Thomas Plos, NXP Semiconductors, Austria

Miguel Morales-Sandoval, CINVESTAV-LTI, Mexico

Fabrizio De Santis, Technische Universität München, Germany

Georgios Selimis, Intrinsic-ID, The Netherlands

Nicolas Sklavos, University of Patras, Greece

Sergei Skorobogatov, University of Cambridge, UK

Steve Trimberger, XILINX, USA

Artemios G. Voyiatzis, SBA Research, Austria

Nogami Yasuyuki, Okayama University, Japan